What instructions from an extended ISA are you referring to? The only ones I've seen written up have been:
1. Instructions to change the memory ordering mode, which allows Rosetta2 to skip some expensive memory fences when translating x86 binaries to ARM.
2. Some instructions for matrix math.
I wouldn't expect either of these to affect typical usage or battery life much, unless your workflow involves running things that do a ton of matrix math.
And the former isn't even an instruction, set a single bit in ACTLR_EL1 and off you go.
The second is an extension that talks to a coprocessor that's quite application specific. And that has an unstable ISA that changes every year. Probably not the biggest priority for anyone.
1. Instructions to change the memory ordering mode, which allows Rosetta2 to skip some expensive memory fences when translating x86 binaries to ARM.
2. Some instructions for matrix math.
I wouldn't expect either of these to affect typical usage or battery life much, unless your workflow involves running things that do a ton of matrix math.