Not exactly the same market as Arduino, and it'll continue to matter about as much since semiconductor manufacturing isn't getting any cheaper.
You know what I'd love to see? An Espressif with a gaggle of RISC-V cores in it. I don't know how much they pay Tensilica. I think they could do a lot with that.
Xtensa is a bit of a mess on the toolchain side, seems to require compiler flag customization for any given model, or it might not even run. For example, endianness is configurable at the architectural level.
You know what I'd love to see? An Espressif with a gaggle of RISC-V cores in it. I don't know how much they pay Tensilica. I think they could do a lot with that.
Xtensa is a bit of a mess on the toolchain side, seems to require compiler flag customization for any given model, or it might not even run. For example, endianness is configurable at the architectural level.